JPS6175596A - スルホール多層回路基板の製造方法 - Google Patents

スルホール多層回路基板の製造方法

Info

Publication number
JPS6175596A
JPS6175596A JP59198162A JP19816284A JPS6175596A JP S6175596 A JPS6175596 A JP S6175596A JP 59198162 A JP59198162 A JP 59198162A JP 19816284 A JP19816284 A JP 19816284A JP S6175596 A JPS6175596 A JP S6175596A
Authority
JP
Japan
Prior art keywords
manufacturing
substrate
hole
holes
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59198162A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0438159B2 (en]
Inventor
治 藤川
柳瀬 一英
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP59198162A priority Critical patent/JPS6175596A/ja
Publication of JPS6175596A publication Critical patent/JPS6175596A/ja
Publication of JPH0438159B2 publication Critical patent/JPH0438159B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP59198162A 1984-09-20 1984-09-20 スルホール多層回路基板の製造方法 Granted JPS6175596A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59198162A JPS6175596A (ja) 1984-09-20 1984-09-20 スルホール多層回路基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59198162A JPS6175596A (ja) 1984-09-20 1984-09-20 スルホール多層回路基板の製造方法

Publications (2)

Publication Number Publication Date
JPS6175596A true JPS6175596A (ja) 1986-04-17
JPH0438159B2 JPH0438159B2 (en]) 1992-06-23

Family

ID=16386492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59198162A Granted JPS6175596A (ja) 1984-09-20 1984-09-20 スルホール多層回路基板の製造方法

Country Status (1)

Country Link
JP (1) JPS6175596A (en])

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6484698A (en) * 1987-09-26 1989-03-29 Matsushita Electric Works Ltd Manufacture of multilayer circuit board
JP2002043454A (ja) * 2000-07-24 2002-02-08 Hitachi Chem Co Ltd 半導体パッケージ用基板の製造方法とその方法を用いた半導体パッケージの製造方法及びこれらの方法を用いた半導体パッケージ用基板と半導体パッケージ
CN104819931A (zh) * 2015-04-24 2015-08-05 深圳崇达多层线路板有限公司 一种电路板盲孔可靠性的检测方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50133465A (en]) * 1974-04-15 1975-10-22
JPS5445960A (en) * 1977-09-16 1979-04-11 Mitsubishi Electric Corp Freezing/melting sludge treatment apparatus
JPS5731188A (en) * 1980-07-31 1982-02-19 Ibigawa Electric Ind Co Ltd Method of producing printed circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50133465A (en]) * 1974-04-15 1975-10-22
JPS5445960A (en) * 1977-09-16 1979-04-11 Mitsubishi Electric Corp Freezing/melting sludge treatment apparatus
JPS5731188A (en) * 1980-07-31 1982-02-19 Ibigawa Electric Ind Co Ltd Method of producing printed circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6484698A (en) * 1987-09-26 1989-03-29 Matsushita Electric Works Ltd Manufacture of multilayer circuit board
JP2002043454A (ja) * 2000-07-24 2002-02-08 Hitachi Chem Co Ltd 半導体パッケージ用基板の製造方法とその方法を用いた半導体パッケージの製造方法及びこれらの方法を用いた半導体パッケージ用基板と半導体パッケージ
CN104819931A (zh) * 2015-04-24 2015-08-05 深圳崇达多层线路板有限公司 一种电路板盲孔可靠性的检测方法

Also Published As

Publication number Publication date
JPH0438159B2 (en]) 1992-06-23

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